1. Field of the Invention
The present invention relates generally to a circuit board device and a manufacturing method thereof, and more particularly, a technique of preventing voids from forming in the solder joint between an electronic component and a circuit board when the electronic component is mounted by reflow soldering.
2. Description of the Related Art
When an electrical component is mounted on a board by reflow soldering in the manufacture of a circuit board device according to a conventional method, solder paste is applied on an electrode land formed on the board by screen printing or the like, and then the electrode land is provided with a component electrode for the electrical component thereon. Then, reflow heating is carried out to solder the component electrode and the electrode land. According to the conventional method, a flux component contained in the solder paste is vaporized into gas during the reflow heating, and the gas does not completely escape outside and forms voids in the soldered joint. For an electrical component having a relatively large soldering area, in particular, it is not easy to let out the gas generated during the reflow heating, so that large voids are generated in the soldered joint between the component electrode and the electrode land.
As a technique of preventing voids from being left in the solder joint, Japanese Patent Application Laid-Open No. 2000-68637A proposes a method of soldering including providing, on the solder paste, two kinds of solder chips having different melting points both beyond the melting point of the solder in the solder paste and thicknesses larger than that of the solder paste, and carrying out reflow heating as an electronic component (power transistor) is supported on both sides. According to the method, gas generated in the solder paste having the lowest melting point is let out from a space secured by the solder chips, then one solder chip having the lower melting point among the two solder chips melts, and then the other solder chip melts, so that the electronic component is in contact with a melt solder surface while it is inclined. According to the disclosure, the gas is removed and does not remain as voids in the solder joint.
As described above, in the manufacture of the circuit board device, when voids are generated at the time of mounting an electrical component to the board by reflow soldering, the solder joint cannot have sufficient mechanical strength. In addition, a crack can be generated in the solder joint because of the void, and the joint strength can be lowered as the crack extends. This is attributable to a reduction in the electrical characteristic of the electrical component. Furthermore, the thermal resistance at the solder joint increases by the presence of the voids, which degrades the heat radiation characteristic of the electrical component and increases the temperature. This eventually breaks down the electrical component.
While the method of soldering an electronic component disclosed by Japanese Patent Application Laid-Open No. 2000-68637A is effective against gas generated from the solder paste that melts first, gas generated from the solder chip that melts last is trapped between the electronic component and the previously melt solder paste and could still remain as voids. In other words, the method would not be extremely effective in preventing voids from forming. The use of the solder paste and the two kinds of solder chips having different melting points increases the number of kinds of solder or the application amount of the solder, and an adhesive is used to fix the solder chips, which can increase the cost of the joint materials. Using the three kinds of solder having different melting points, it takes longer to apply the solder, and the quality of the solder must be controlled. This is inefficient and disadvantageous in terms of productivity.